The Department of Electronics and Communication Engineering (ECE), in collaboration with the Directorate of Technical Education (DTE), organized a Faculty Development Programme (FDP) on “VLSI System Design: Exploration of EDA tools for System on CHip (SoC) design” from February 5th to February 9th, 2024.

The FDP focused on chip making, covering SoC architecture, RISC-V, physical design, FPGA, and verification. Lab sessions used Cadence, Synopsis EDA, and Xilinx Vivado. Facilitators included experts from RISE Lab at IIT Madras, faculty, and industry experts. Feedback praised the comprehensive content and hands-on learning.The session was coordinated by Prof. Adersh V R and Prof. Sudhi S.