You are here

Ajayan KR

Error message

Notice: Undefined property: stdClass::$css_class in theme_openacademy_wireframe_background_callout_render_pane() (line 19 of /home/ece/public_html/profiles/openacademy/themes/openacademy_wireframe/plugins/styles/background_callout/background_callout.inc).
Ajayan KR

Journal

  1. Linear transconductor with flipped voltage follower in 130 nm CMOS , Ajayan K.R., Navakanta Bhat, Analog Integr Circ Sig Process (2010), No. 63, PP 321-327
  2. Statistical Modeling Method for Process Variability in 45nm Analog CMOS Technology,  Ajayan K.R., Navakanta Bhat, Proc. SPIE 8549854909 (October 15, 2012); doi:10.1117/12.926853

Conference

  1. A.P. James, K.R Ajayan and M.R Baiju, 1V CMOS Current Mirror Based on Peudo Resistive Feedback, In proceedings of MIPRO 2005 27th international convention, May 30, 2005.
  2. A.P. James,K.R. Ajayan and M.R. Baiju, Designing low voltage pseudo resistive current mirror under technology scaling, In proceedings of 12th international conference MIXDES 2005, IEEE Poland, June 22, 2005.
  3. A.P. James, K.R Ajayan, Nanoscale design of low power supply pseudo resistive cascode current mirror, In progress of 9th VLSI design and test symposium (VDAT), IEEE India, August 10, 2005.
  4. P. R Nair, A. P James, K. R.Ajayan, CMOS Current Mode Digital Full Adder, In proceedings of MIPRO 28th international convention, May 30, 2006.
  5. V. Aravind, A. P James, S. Sreejith, K.R.Ajayan, Bulk Driven Cascode Current Mirror, In proceedings of MIPRO 28th international convention, May 30, 2006.
  6. Asha Anju, A. P James, S.Gowri , K. R Ajayan, Two-to -one Multiplexer using pseudoresistive load, In proceedings of MIPRO 28th international convention, May 30, 2006.
  7. N.T.P.Ashok, K.W.Juny, A. P James, K.R.Ajayan, Low Voltage Class AB Opamp, In proceedings of MIPRO international convention, May 30, 2006.
  8. Ashok Chandran J, Josen George, A. P James, K.R Ajayan, 1 Volt CMOS Differential Mode Sense Amplifier, In proceedings of MIPRO XXVIII international convention,May 30,2006.
  9. P James, Shruti S. G, Vimitha A. K, K.R. Ajayan, A Low-Voltage Track and Hold Circuit using CMOS Current Mirror with Pseudo-Resistive Feedback, In proceedings of MIPRO 28th international convention, May 30,2006.
  10. IMPACT OF PROCESS VARIABILITY ON  28nm ANALOG CMOS PERFORMANCE , Ajayan K.R., Navakanta Bhat, 13th IEEE/VSI VLSI Design And Test Symposium, July 2009,Bangalore
  11. Impact of Annealing Temperature on Device Variability,  Ajayan K.R., Navakanta Bhat, IWPSD 2009,Decmber 2009 , NEWDELHI.
  12. Device Oriented Statistical Modeling Method for Process Variability in 45nm Analog CMOS  Technology,  Ajayan K.R., Navakanta Bhat, IWPSD 11,Decmber  , Kanpur.
  13.  Linear transconductance amplifier with pseudo resitive feedback, Manu Jacob, Ajayan K.R. VDAT2014, july2014 PSG  Coimbatore
  14.  Linear transconductance amplifier with filpped votage follower and  pseudo resitive feedback, Manu Jacob, Ajayan K.R. NCCT2014, Trivandrum.
  15.  Gain boosted cascode amplifier with  pseudo resitive feedback in 130nm CMOS technology, Jobin jose, Ajayan K.R. NCCT2014, Trivandrum.

Publications

Journals:
Journal/ Conference
Textbooks, Journal, Conference